Cai Xiaowu, associate professor at light industry college, Liaoning University. He received M.S. degree in microelectronics from the Shanghai institute of technical physics of the Chinese academy of sciences in 2005. He received Ph.D. degree in microelectronics from the institute of microelectronics of Chinese academy of sciences in 2008.
His research interests are in the areas of semiconductor process and device, with current focus on ESD device and power IC design. His current research emphasis includes process and device TCAD simulation, semiconductor DC and RF device modeling, analog circuit schematic and layout design, cadence skill coding layout, ESD device and IO cell design, power IC design.
The main research achievements are as follows:
Xiaowu Cai, Beiping Yan , Huo Xiao, et al. “NMOS based feedback power clamp for on chip ESD protection”, US Patent, US8369054, 2013.
Xiaowu Cai, Beiping Yan, Huo Xiao. “Area efficient clamp for power ring ESD protection using a transmission gate”, US Patent, filed and pending, 2014.
Xiaowu Cai, Beiping Yan, Huo Xiao. “A new ESD clamp for SOI and FinFET floating body process, US Patent, filed and pending, 2014.
Xiaowu Cai, Beiping Yan, Zhongzi Chen. “A lateral diode, vertical-SCR hybrid structure for high-level ESD protection”, US Patent, filed and pending, 2015.
Xiaowu Cai, Beiping Yan, “Investigation of ESD second breakdown TCAD simulation”, ICSICT 2010:1665 –1667
Xiaowu Cai, Beiping Yan, XiaoHuo, “An area efficient clamp based on transmission gate feedback for power rail ESD protection”, IEEE Electron Device Letters, Vol.36, no.7, pp.639-641.